This invention relates to semiconductor memory devices, and more particularly to sense circuits for single-ended memory array devices.
Floating gate type electrically programmable memories are manufactured using cell arrays of the type seen in U.S. Pat. Nos. 4,112,509 and 4,122,544, issued to Wall and McElroy, assigned to Texas Instruments. Several manufacturers produce EPROM devices of these or similar layouts in 8K, 16K, 32K and recently 64K bit sizes. The continuing demand for higher speed and lower cost, however, requires reduction in cell size or increase in bit density. Other improvements in EPROM devices include the requirement for a "power down" condition, and the use of only one 5v power supply.
In prior EPROM devices, sensing of the state of the addressed bit in an array has been by means of a circuit which also functioned as the array bias source. The column decoding scheme allowed only a single column line to be biased at one time; nonselected column lines were electrically floating. This type of sense circuit has disadvantages in the power down condition because all the column lines were discharged, so on power up the array had to be precharged. The circuit also required delicate matching of current sources to the characteristics of the storage cells, and stringent control of reference voltages. The number of transistors in series in the sense circuit made the voltage swing to be detected much smaller than preferred for conservative design. The prior circuit was basically a current detection scheme. The conflicting requirements of array bias and logic detection in the prior circuit cause the device to be slow, difficult to power down, and susceptible to process parameter variations.
Single-ended memory arrays have generally employed single-ended sensing circuits. Differential sense amplifiers have been commonly used in dynamic RAM memory devices where the column lines are split into two equal halves. Examples of typical sense amplifiers of this type are shown in U.S. Pat. No. 4,081,701, issued to White, McAdams and Redwine, or application Ser. No. 944,822 filed Sept. 22, 1978, both assigned to Texas Instruments or in Electronics magazine of Sept. 13, 1973, at pp. 116-121, Feb. 19, 1976, at pp. 116-121, May 13, 1976, at pp. 81-86 and Sept. 28, 1978, at pp. 109-116.
It is the principal object of this invention to provide an improved data output circuit for memories such as EPROM or ROM devices. Another object is to provide an improved sensing circuit for "virtual ground" type memory arrays as used for MOS EPROM or ROM devices. A further object is to provide a read-out arrangement for accessing a memory array in an improved manner.